VSC8504-02 datasheet(97/131 Pages) MICROSEMI

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Registers

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

4.6.16

Extended Revision ID

The following table lists the extended revision ID information.

4.7

Clause 45 Registers to Support Energy Efficient Ethernet

and 802.3bf

This section describes the Clause 45 registers that are required to support energy efficient Ethernet.

Access to these registers is through the IEEE standard registers 13 and 14 (MMD access control and

MMD data or address registers) as described in section 4.2.11 and 4.2.12.

The following table lists the addresses and register names in the Clause 45 register page space. When

the link is down, 0 is the value returned for the x.180x addresses.

4.7.1

PCS Status 1

The bits in the PCS Status 1 register provide a status of the EEE operation from the PCS for the link that

is currently active.

Table 89 •

Extended Revision ID, Address 30G (0x1E)

Bit

Name

Access Default

Description

15:1 Reserved

0x0000

Reserved

Ext Rev ID RO

0x1

Revision E

Table 90 •

Clause 45 Registers Page Space

Address Name

1.1801

Tx maximum delay through PHY

1.1803

Tx minimum delay through PHY

1.1805

Rx maximum delay through PHY

1.1807

Rx minimum delay through PHY

3.1

PCS status 1

3.20

EEE capability

3.22

EEE wake error counter

4.1801

Tx maximum delay through xMII (SGMII, QSGMII, including FIFO variations)

4.1803

Tx minimum delay through xMII (SGMII, QSGMII, including FIFO variations)

4.1805

Rx maximum delay through xMII (SGMII, QSGMII, including FIFO variations)

4.1807

Rx minimum delay through xMII (SGMII, QSGMII, including FIFO variations)

7.60

EEE advertisement

7.61

EEE link partner advertisement

Table 91 •

PCS Status 1, Address 3.1

Bit

Name

Access Description

15:12 Reserved

Reserved

Tx LPI received

RO/LH

1: Tx PCS has received LPI

0: LPI not received

Rx LPI received

RO/LH

1: Rx PCS has received LPI

0: LPI not received

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