IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

IXFY4N60P3 IXFA4N60P3

IXFP4N60P3

Fig. 7. Input Admittance

-

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

- 40

25

Fig. 8. Transconductance

0

1

2

3

4

5

6

7

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

5.5

25

125

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

2

4

6

8

10

12

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

Fig. 10. Gate Charge

0

1

2

3

4

5

6

7

8

9

10

012

3456

7

Fig. 11. Capacitance

1

10

100

1,000

0

5

10

15

20

25

30

35

40

f = 1 MHz

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Area

0.1

1

10

10

100

1,000

Single Pulse

100μs

1ms

25μs