MPC866PZP100 datasheet(74/92 Pages) FREESCALE

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MPC866/859 Hardware Speciﬁcations

MOTOROLA

FEC Electrical Characteristics

14.4

MII Serial Management Channel Timing (MII_MDIO,

MII_MDC)

Table 36 shows the timing for the MII serial management channel signal. The FEC functions correctly with

a maximum MDC frequency in excess of 2.5 MHz. The exact upper bound is under investigation.

Figure 77 shows the MII serial management channel timing diagram.

Figure 77. MII Serial Management Channel Timing Diagram

Table 36. MII Serial Management Channel Timing

Num

Characteristic

Min

Max

Unit

M10

MII_MDC falling edge to MII_MDIO output invalid (minimum

propagation delay)

0—

M11

MII_MDC falling edge to MII_MDIO output valid (maximum

propagation delay)

—25

M12

MII_MDIO (input) to MII_MDC rising edge setup

—

M13

MII_MDIO (input) to MII_MDC rising edge hold

—

M14

MII_MDC pulse width high

40%

60%

MII_MDC period

M15

MII_MDC pulse width low

40%

60%

MII_MDC period

M11

MII_MDC (output)

MII_MDIO (output)

M12

M13

MII_MDIO (input)

M10

M14

MM15

Freescale Semiconductor, Inc.

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