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RF96 Datasheet(PDF) 65 Page - HOPE Microelectronics CO., Ltd. |
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RF96 Datasheet(HTML) 65 Page - HOPE Microelectronics CO., Ltd. |
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65 / 121 page ![]() Page 65 RF96/97/98 Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com WIRELESS & SENSING PRELIMINARY DATASHEET 4.2.12. Continuous Mode 4.2.12.1. General Description As illustrated in Figure 29, in Continuous mode the NRZ data to (from) the (de)modulator is directly accessed by the uC on the bidirectional DIO2/DATA pin. The FIFO and packet handler are thus inactive. Tx/Rx CONTROL DIO0 DIO1/DCLK DIO2/DATA DIO3 DIO4 DIO5 Data Rx SYNC RECOG. SPI NSS SCK MOSI MISO Figure 29. Continuous Mode Conceptual View 4.2.12.2. Tx Processing In Tx mode, a synchronous data clock for an external uC is provided on DIO1/DCLK pin. Clock timing with respect to the data is illustrated in Figure 30. DATA is internally sampled on the rising edge of DCLK so the uC can change logic state anytime outside the grayed out setup/hold zone. T_DATA T_DATA DATA (NRZ) DCLK Figure 30. Tx Processing in Continuous Mode Note the use of DCLK is required when the modulation shaping is enabled (see section 3.4.5). |
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