RF96 datasheet(36/121 Pages) HOPE

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Page 36

RF96/97/98

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It is also important to note that the demodulated bytes are written in the data buffer memory in the order received. Meaning,

the first byte of a new packet is written just after the last byte of the preceding packet. The RX modem address pointer is

never reseted as long as this mode is enabled. It is therefore necessary for the controller to handle the address pointer to

make sure the FIFO data buffer is never full.

In continuous mode the received packet processing sequence is given below.

1 Whilst in Sleep or Stand-by mode select RXCONT mode.

2 Upon reception of a valid header CRC the RxDone interrupt is set. The radio remains in RXCONT mode waiting for the

next RX LoRaTM packet.

3 The PayloadCrcError flag should be checked for packet integrity.

4 If packet has been correctly received the FIFO data buffer can be read (see below).

5 The reception process (steps 2 - 4) can be repeated or receiver operating mode exited as desired.

In continuous mode status information are available only for the last packet received, i.e. the corresponding registers

should be read before the next RxDone arrives.

Payload Data Extraction from FIFO

In order to retrieve received data from FIFO the user must ensure that ValidHeader, PayloadCrcError, RxDone and

RxTimeout

interrupts in the status register RegIrqFlags are not asserted to ensure that packet reception has terminated

successfully (i.e. no flags should be set).

In case of errors the steps below should be skipped and the packet discarded. In order to retrieve valid received data from

the FIFO the user must:

 FifoNbRxBytes Indicates the number of bytes that have been received thus far.

 RegRxDataAddr Is a dynamic pointer that indicates precisely where the Lora modem received data has been written up

to.

 Set FifoPtrAddr to FifoRxCurrentAddr. This sets the FIFO pointer to the the location of the last packet received in the

FIFO. The payload can then be extracted by reading the RegFifo address RegNbRxBytes times. Alternatively, it is

possible to manually point to the location of the last packet received from the start of the current packet by setting

FifoPtrAddr

to RegRxDataAddr - FifoNbRxBytes. In the same way, packet bytes can then be extracted from FIFO by

reading the RegFifo address RegNbRxBytes times.

Packet Filtering based on Preamble Start

The LoRa modem does automatically filter received packets based upon any addressing. However the RF96/97/98 permit

software filtering of the received packets based on the contents of the first few bytes of payload. A brief example is given

below for a 4 byte address, however, the address length can be selected by the designer.

The objective of the packet filtering process is to determine the presence, or otherwise, of a valid packet designed for the

receiver. If the packet is not for the receiver then the radio returns to sleep mode in order to improve battery life.

The software packet filtering process follows the steps below:

RF96 Datasheet(PDF) 36 Page - HOPE Microelectronics CO., Ltd.

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