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CS61575-IP1 Datasheet(PDF) 28 Page - Cirrus Logic

No. de pieza CS61575-IP1
Descripción Electrónicos  T1/E1 LINE INTERFACE
PDF  44 Pages
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61575-IP1 Datasheet(HTML) 28 Page - Cirrus Logic

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APPLICATIONS
Line Interface
Figures A1-A3 show typical T1 and E1 line inter-
face application circuits. Table A1 shows the
external components which are specific to each
application. Figure A1 illustrates a T1 interface in
the Host Mode. Figure A2 illustrates a 120
Ω E1
interface in the Hardware Mode. Figure A3 illus-
trates a 75
Ω E1 interface in the Extended
Hardware Mode
The receiver transformer has a grounded center
tap on the IC side. Resistors between the RTIP
and RRING pins to ground provide the termina-
tion for the receive line.
The transmitter transformer matches the 75
Ω
transmitter output impedance to the line imped-
ance. Figures A1-A3 show a 0.47
µF capacitor in
series with the transmit transformer primary. This
capacitor is needed to prevent any output stage
imbalance from resulting in a DC current through
the transformer primary. This current might satu-
rate the transformer producing an output offset
level shift.
Control
&
Monitor
Frame
Format
Encoder/
Decoder
CS61574A
OR
CS61575
IN
HOST
MODE
RECEIVE
LINE
TRANSMIT
LINE
28
1
12
11
5
7
6
8
3
4
2
9
10
XTL
RV+
+
68
µF
RGND
0.1
µF
+5V
21
15
+
1.0
µF
TGND
RV+
TV+
CLKE
ACLKI
LOS
DPM
MODE
RPOS
RNEG
RCLK
TPOS
TNEG
TCLK
XTALIN
XTALOUT
RGND
TGND
22
14
SCLK
CS
INT
SDI
SDO
RTIP
RRING
MTIP
MRING
TRING
TTIP
19
20
17
18
16
13
R1
R2
1
3
5
2
6
0.47
µF
2
6
1
5
1:1.15
PE-65388
2CT:1
PE-65351
µP
Serial
Port
27
26
23
24
25
+5V
100 k
Ω
Figure A1. T1 Host Mode Configuration
Frequency
MHz
Cable
Ω
R1 and R2
Ω
Transmit
Transformer
Crystal
XTL
1.544 (T1)
100
200
1:1.15
CXT6176
2.048 (E1)
120
240
1:1.26
CXT8192
75
150
1:1
Table A1. External Component Values
CS61574A CS61575
28
DS154F2



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