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CS61575-IP1 Datasheet(PDF) 19 Page - Cirrus Logic

No. de pieza CS61575-IP1
Descripción Electrónicos  T1/E1 LINE INTERFACE
PDF  44 Pages
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS61575-IP1 Datasheet(HTML) 19 Page - Cirrus Logic

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Power Supply
The device operates from a single +5 Volt supply.
Separate pins for transmit and receive supplies
provide internal isolation. These pins should be
connected externally near the device and decou-
pled to their respective grounds. TV+ must not
exceed RV+ by more than 0.3V.
Decoupling and filtering of the power supplies is
crucial for the proper operation of the analog cir-
cuits in both the transmit and receive paths. A 1.0
µF capacitor should be connected between TV+
and TGND, and a 0.1
µF capacitor should be con-
nected between RV+ and RGND. Use mylar or
ceramic capacitors and place them as closely as
possible to their respective power supply pins. A
68
µF tantalum capacitor should be added close
to the RV+/RGND supply. Wire-wrap bread-
boarding of the line interface is not recommended
because lead resistance and inductance serve to
defeat the function of the decoupling capacitors.
Schematic & Layout Review Service
Confirm Optimum
Schematic & Layout
Before Building Your Board.
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Call Applications Engineering.
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Bits
Status
567
0
0
0
Reset has occurred or no program input.
001
TAOS in effect.
0
1
0
LLOOP in effect
0
1
1
TAOS/LLOOP in effect.
1
0
0
RLOOP in effect.
1
0
1
DPM changed state since last "clear DPM"
occurred.
1
1
0
LOS changed state since last "clear LOS"
occurred.
1
1
1
LOS and DPM have changed state since
last "clear LOS" and "clear DPM".
Table 12. Coding for Serial Output bits 5,6,7
CS61574A CS61575
DS154F2
19



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