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X5083P Datasheet(PDF) 1 Page - Xicor Inc. |
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X5083P Datasheet(HTML) 1 Page - Xicor Inc. |
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1 / 21 page ![]() REV 1.1.6 6/25/02 Characteristics subject to change without notice. 1 of 21 www.xicor.com X5083 CPU Supervisor with 8Kbit SPI EEPROM FEATURES • Low VCC detection and reset assertion —Four standard reset threshold voltages 4.63V, 4.38V, 2.93V, 2.63V —Re-program low VCC reset threshold voltage using special programming sequence. —Reset signal valid to VCC = 1V • Selectable time out watchdog timer • Long battery life with low power consumption —<50µA max standby current, watchdog on —<1µA max standby current, watchdog off —<400µA max active current during read • 8Kbits of EEPROM • Save critical data with Block Lock™ memory —Block lock first or last page, any 1/4 or lower 1/2 of EEPROM array • Built-in inadvertent write protection —Write enable latch —Write protect pin • SPI Interface - 3.3MHz clock rate • Minimize programming time —16 byte page write mode —5ms write cycle time (typical) • SPI modes (0,0 & 1,1) • Available packages —8-lead TSSOP, 8-lead SOIC, 8-Lead PDIP APPLICATIONS • Communications Equipment —Routers, Hubs, Switches —Set Top Boxes • Industrial Systems —Process Control —Intelligent Instrumentation • Computer Systems —Desktop Computers —Network Servers • Battery Powered Equipment uC RESET CS SCK SI SO WP VCC VSS RESET SPI VCC VSS X5083 Typical Application 2.7-5.0V 10K BLOCK DIAGRAM Watchdog Timer Command Decode & Control Logic SI SO SCK CS/WDI VCC POR and Low Generation VTRIP + - RESET (X5083) Voltage Reset Protect Logic 8Kbits EEPROM Watchdog Detector WP Array Status Register Transition Reset Reset & Watchdog Timebase X5083 Standard VTRIP Level Suffix 4.63V (+/-2.5%) -4.5A 4.38V (+/-2.5%) -4.5 2.93V (+/-2.5%) -2.7A 2.63V (+/-2.5%) -2.7 See “Ordering Information” on page 21 for more details For Custom Settings, call Xicor. |
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