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STM8S003F3 Datasheet(PDF) 78 Page - STMicroelectronics |
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STM8S003F3 Datasheet(HTML) 78 Page - STMicroelectronics |
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78 / 104 page ![]() Electrical characteristics STM8S003F3 STM8S003K3 78/104 DocID018576 Rev 9 Figure 38. SPI timing diagram - slave mode and CPHA = 0 Figure 39. SPI timing diagram - slave mode and CPHA = 1(1) 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. 3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z. |
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