ST72361AR4-Auto datasheet(75/279 Pages) STMICROELECTRONICS

No. de pieza	ST72361AR4-Auto

Descripción Electrónicos	Clock, reset and supply management

PDF	279 Pages

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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75 / 279 page

ST72361xx-Auto

I/O ports

Doc ID 12468 Rev 3

75/279

Warning:

The analog input voltage level must be within the limits

stated in the absolute maximum ratings.

8.3

I/O port implementation

The hardware implementation on each I/O port depends on the settings in the DDR and OR

registers and specific feature of the I/O port such as ADC Input or true open drain.

Switching these I/O ports from one state to another should be done in a sequence that

prevents unwanted side effects. Recommended safe transitions are illustrated in Figure 33.

Other transitions are potentially risky and should be avoided, since they are likely to present

unwanted side-effects such as spurious interrupt generation.

Figure 33.

Interrupt I/O port state transitions

8.4

I/O port register configurations

The I/O port register configurations are summarized as follows.

8.4.1

Standard ports

floating/pull-up

interrupt

INPUT

floating

(reset state)

INPUT

open-drain

OUTPUT

push-pull

OUTPUT

= DDR, OR

Table 28.

Configuration of PB7:6, PC0, PC3, PC7:5, PD3:2, PD5, PE7:0, PF7:0

Mode

DDR

Floating input

Pull-up input

Open drain output

Push-pull output

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