TNETV6446AINZWT datasheet(185/227 Pages) TI1

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TMS320DM6446

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SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010

Table 6-71. USB 2.0 Register Descriptions (continued)

Address

Acronym

0x01C6 41E0

RCPPIDMASTATEW0

RX CPPI DMA State Word 0

0x01C6 41E4

RCPPIDMASTATEW1

RX CPPI DMA State Word 1

0x01C6 41E8

RCPPIDMASTATEW2

RX CPPI DMA State Word 2

0x01C6 41EC

RCPPIDMASTATEW3

RX CPPI DMA State Word 3

0x01C6 41F0

RCPPIDMASTATEW4

RX CPPI DMA State Word 4

0x01C6 41F4

RCPPIDMASTATEW5

RX CPPI DMA State Word 5

0x01C6 41F8

RCPPIDMASTATEW6

RX CPPI DMA State Word 6

0x01C6 41FC

RCPPICOMPPTR

RX CPPI Completion Pointer

Core Registers

0x01C6 4400

FADDR

Function Address Register

0x01C6 4401

POWER

Power Management Register

0x01C6 4402

INTRTX

Interrupt Register for Endpoint 0 plus TX Endpoints 1 to 4

0x01C6 4404

INTRRX

Interrupt Register for RX Endpoints 1 to 4

0x01C6 4406

INTRTXE

Interrupt Enable Register for INTRTX

0x01C6 4408

INTRRXE

Interrupt Enable Register for INTRRX

0x01C6 440A

INTRUSB

Interrupt Register for Common USB Interrupts

0x01C6 440B

INTRUSBE

Interrupt Enable Register for INTRUSB

0x01C6 440C

FRAME

Frame Number Register

0x01C6 440E

INDEX

Index register for selecting the endpoint status and control registers

0x01C6 440F

TESTMODE

0x01C6 4410

TXMAXP

Maximum packet size for peripheral/host TX endpoint (Index register set to select

Endpoints 1 - 4 only)

PERI_CSR0

Control Status register for Endpoint 0 in Peripheral mode. (Index register set to

select Endpoint 0)

HOST_CSR0

Control Status register for Endpoint 0 in Host mode. (Index register set to select

Endpoint 0)

0x01C6 4412

PERI_TXCSR

Control Status register for peripheral TX endpoint. (Index register set to select

Endpoints 1 - 4)

HOST_TXCSR

Control Status register for host TX endpoint. (Index register set to select

Endpoints 1 - 4)

0x01C6 4414

RXMAXP

Maximum packet size for peripheral/host RX endpoint (Index register set to select

Endpoints 1 - 4 only)

PERI_RXCSR

Control Status register for peripheral RX endpoint. (Index register set to select

Endpoints 1 - 4)

0x01C6 4416

HOST_RXCSR

Control Status register for host RX endpoint. (Index register set to select

Endpoints 1 - 4)

COUNT0

Number of received bytes in Endpoint 0 FIFO. (Index register set to select

Endpoint 0)

0x01C6 4418

RXCOUNT

Number of bytes in host RX endpoint FIFO. (Index register set to select

Endpoints 1 - 4)

0x01C6 441A

HOST_TYPE0

Defines the speed of Endpoint 0

0x01C6 441A

HOST_TXTYPE

Sets the operating speed, transaction protocol and peripheral endpoint number

for the host TX endpoint. (Index register set to select Endpoints 1 - 4 only)

0x01C6 441B

HOST_NAKLIMIT0

Sets the NAK response timeout on Endpoint 0. (Index register set to select

Endpoint 0)

0x01C6 441B

HOST_TXINTERVAL

Sets the polling interval for Interrupt/ISOC transactions or the NAK response

timeout on Bulk transactions for host TX endpoint. (Index register set to select

Endpoints 1 - 4 only)

0x01C6 441C

HOST_RXTYPE

Sets the operating speed, transaction protocol and peripheral endpoint number

for the host RX endpoint. (Index register set to select Endpoints 1 - 4 only)

0x01C6 441D

HOST_RXINTERVAL

Sets the polling interval for Interrupt/ISOC transactions or the NAK response

timeout on Bulk transactions for host RX endpoint. (Index register set to select

Endpoints 1 - 4 only)

Peripheral and Electrical Specifications

185

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