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TNETV2664FIBZWT Datasheet(PDF) 166 Page - Texas Instruments

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No. de pieza TNETV2664FIBZWT
Descripción Electrónicos  Fixed-Point Digital Signal Processor
PDF  249 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
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TNETV2664FIBZWT Datasheet(HTML) 166 Page - Texas Instruments

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MXI/CLKIN
2
3
4
4
5
1
TMS320C6424
SPRS347D – MARCH 2007 – REVISED DECEMBER 2009
www.ti.com
6.7.3
Clock PLL Considerations with External Clock Sources
If the internal oscillator is bypassed, to minimize the clock jitter a single clean power supply should power
both the C6424 device and the external clock oscillator circuit. The minimum CLKIN rise and fall times
should also be observed. For the input clock timing requirements, see Section 6.7.4, Clock PLL Electrical
Data/Timing (Input and Output Clocks).
Rise/fall times, duty cycles (high/low pulse durations), and the load capacitance of the external clock
source must meet the device requirements in this data manual (see Section 5.3, Electrical Characteristics
Over Recommended Ranges of Supply Voltage and Operating Case Temperature and Section 6.7.4,
Clock PLL Electrical Data/Timing (Input and Output Clocks).
6.7.4
Clock PLL Electrical Data/Timing (Input and Output Clocks)
Table 6-19. Timing Requirements for MXI/CLKIN(1) (2) (3) (4) (see Figure 6-12)
-7/-6/-5/-4
-L/-Q6/-Q5/-Q4
NO.
UNIT
MIN
MAX
1
tc(MXI)
Cycle time, MXI/CLKIN
33.3
66.7
ns
2
tw(MXIH)
Pulse duration, MXI/CLKIN high
0.45C
0.55C
ns
3
tw(MXIL)
Pulse duration, MXI/CLKIN low
0.45C
0.55C
ns
4
tt(MXI)
Transition time, MXI/CLKIN
0.05C
ns
5
tJ(MXI)
Period jitter, MXI/CLKIN
0.02C
ns
(1)
The MXI/CLKIN frequency and PLL multiply factor should be chosen such that the resulting clock frequency is within the specific range
for CPU operating frequency. For example, for a -6 speed device with a 25 MHz CLKIN frequency, the PLL multiply factor should be
≤ 24.
(2)
The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.
(3)
For more details on the PLL multiplier factors, see TMS320C642x DSP Phase-Locked Loop Controller (PLLC) User's Guide (literature
number SPRUES0).
(4)
C = CLKIN cycle time in ns. For example, when MXI/CLKIN frequency is 30 MHz, use C = 33.3 ns.
Figure 6-12. MXI/CLKIN Timing
166
Peripheral Information and Electrical Specifications
Copyright © 2007–2009, Texas Instruments Incorporated
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Product Folder Link(s): TMS320C6424



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