REV. 0

AD9821

–5–

PIN CONFIGURATION

36

35

34

33

32

31

30

29

28

27

26

25

13 14 15 16 17 18 19 20 21 22 23 24

1

2

3

4

5

6

7

8

9

10

11

12

48 47 46 45 44

39 38 37

43 42 41 40

PIN 1

IDENTIFIER

TOP VIEW

(Not to Scale)

TEST

AVSS

TEST

AVDD2

BYP1

VIN–

VIN+

(LSB) D0

D1

D2

D3

D4

D5

D6

NC = NO CONNECT

D7

D8

D9

D10

TEST

TEST

AVDD1

AVSS

AD9821

(MSB) D11

AVSS

PIN FUNCTION DESCRIPTIONS

Pin Number

Mnemonic

Type

Description

1–12

D0–D11

DO

Digital Data Outputs

13

DRVDD

P

Digital Output Driver Supply

14

DRVSS

P

Digital Output Driver Ground

15, 41

DVSS

P

Digital Ground

16

DATACLK

DI

Digital Data Output Latch Clock

17

DVDD1

P

Digital Supply

18, 24, 37, 42, 47, 48

NC

NC

Internally Not Connected. May be Tied High or Low.

19

PBLK

DI

Preblanking Clock Input

20

CLPOB

DI

Black Level Clamp Clock Input

21–23

TEST

DI

Test Use Only. Tie to VDD or VSS.

25, 26, 35

AVSS

P

Analog Ground

27

AVDD1

P

Analog Supply

28, 29

TEST

AO

Test Use Only. Tie to VDD or VSS.

30

VIN+

AI

Positive Analog Input for Imager Signal

31

VIN–

AI

Negative Analog Input for Imager Signal

32

BYP1

AO

Internal Bias Level Decoupling

33

AVDD2

P

Analog Supply

34, 36

TEST

AI

Test Use Only. Tie to VDD or VSS.

38

VRT

AO

ADC Top Reference Voltage Decoupling

39

VRB

AO

ADC Bottom Reference Voltage Decoupling

40

DVDD2

P

Digital Supply

43

STBY

DI

Standby Mode, Active High. Same as Total Power-Down Mode.

44

SL

DI

Serial Digital Interface Load Pulse

45

SDATA

DI

Serial Digital Interface Data

46

SCK

DI

Serial Digital Interface Clock

TYPE: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.