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P9038-RNDGI8 Datasheet(PDF) 10 Page - Integrated Device Technology |
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P9038-RNDGI8 Datasheet(HTML) 10 Page - Integrated Device Technology |
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10 / 18 page ![]() P9038 DATASHEET ©2016 Integrated Device Technology, Inc. 10 P9038 August 1, 2016 Description of the Wireless Power Charging System A wireless charging system is comprised of a base station (transmitter) and a secondary coil (receiver) positioned against each other allowing power to be transferred magnetically. A WPC1 transmitter may be a free-positioning or magnetically-guided type. A free-positioning type of transmitter has an array of coils that gives limited spatial freedom to the end-user, whereas a magnetically-guided type of transmitter helps the end-user align the receiver to the transmitter with a magnetic attraction. The amount of power transferred to the Wireless charging device is controlled by the receiver. The receiver sends communication packets to the transmitter to increase power, decrease power, or maintain the power level. The communication is digital, and communication of 1's and 0's is achieved by the Rx modulating the amount of load on the receiver coil. To conserve power, the transmitter places itself in a very-low-power sleep mode unless it detects the presence of a receiver. Once a receiver is detected, the transmitter exits sleep mode and begins the power transfer per the WPC specification. Input Capacitors Improper selection of the decoupling capacitor will degrade the electrical performance of the P9038. The REG_IN and IN_A to IN_D are the supply rails with nominal operating range of 4.5V to 6.9V powering the internal drivers and the full bridge inverter, respectively. At full load, the current through these pins are both high and fast switching. Typically, three 10µF and one 0.1µF ceramic capacitor across the IN_A to IN_D pins are recommended. Similarly, for REG_IN, a 1µF in parallel with 0.1µF capacitors are sufficient. Prior to selecting the capacitor, always examine the capacitor's DC voltage coefficient characteristics as the value of the capacitors will decrease due to capacitance-to-applied voltage characteristics of the commonly-used ceramic dielectrics. For example, a 22µF X7R 6.3V capacitor's value can actually be 6µF when operating at 5V, depending on the manufacturer. Typically, 10V- or 16V-rated capacitors are required. It is typically best to select these capacitors with a voltage rating from two to two and half times the expected applied voltage. For optimum device performance, the decoupling capacitors must be mounted on the component side of the PCB, and also, located as physically close as possible to the related power pins and power ground (PGND). LDO5V & LDO2P5V The LDO5V and LDO2P5V are 5V and 2.5V linear regulators designed to power the internal circuitry. They can support maximum of 10mA and 5mA of load current, respectively. To stabilize the regulators, a 1µF capacitor from the output pin to GND must be connected. The GATE pin and associated MOSFET shown in Figure 2 below provide protection to the P9038 from input over-voltage events and control current inrush. Both of these features are described in subsequent sections of this document. Figure 2. Input Voltage Support Range (UVLO) Full-bridge MOSFET Drive and MOSFET Current Sense The P9038 incorporates an integrated full-bridge inverter. Each half-bridge contains a high-side current sense block that is used for control and for peak current protection. For EMI reduction purposes, the switching rising and falling rates of the internal MOSFETs are controlled. Input Over-voltage Protection and In-rush Control The P9038 offers additional protection in the event of input voltage transients and the programmable soft start time to minimize the inrush currents. The P9038 is powered from a VBUS input which may be subjected to voltages above 5.5V under normal operation. The P9038 is designed to support voltages as high as 27 V on this input. An external OVP MOSFET is used to isolate pins that would be damaged by a 27 V transient on the VBUS input. The OVP MOSFET has a second function: limiting inrush current from the VBUS line during startup. This is necessary due to the USB inrush specification and the large total effective capacitance (~40µF) on the REG_IN and IN pins of the IC. P9038 REG_IN CREG_IN LDO5V CLDO5V GATE VBUS_SNS ADAPTOR 4.5 V Min 25 m To Inverter IDC = 1.5 A 4.5 V - 25 m * 1.5 A = 4.46 V 5 To IC IDC = 45 mA For Demonstration Purposes Only Not All Connections Shown Not To Scale 4.46 V – 5 * 45 mA = 4.23 V LDO2P5V_IN LDO2P5V LDO2P5V UVLO BAND GAP LDO5V INVERTER & MCU |
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