MB95F613K datasheet(84/110 Pages) CYPRESS

84 / 110 page

Document Number: 002-04698 Rev. *A

Page 84 of 110

PRELIMINARY

MB95610H Series

(Continued)

(VCC = 2.4 V to 5.5 V, VSS = 0.0 V, TA = 40 °C to 85 °C)

*: The external clock signal is input to X0 and the inverted external clock signal to X1.

Parameter

Symbol

Pin name

Condition

Value

Unit

Remarks

Min

Typ

Max

Clock cycle time

tHCYL

X0, X1

—

61.5

—

1000

When the main oscillation circuit

is used

X1: open

83.4

—

1000

When an external clock is used

X0, X1

30.8

—

1000

tLCYL

X0A, X1A

—

30.5

—

µs

When the subclock is used

Input clock

pulse width

tWH1,

tWL1

X1: open

33.4

—

When an external clock is used,

the duty ratio should range

between 40% and 60%.

X0, X1

14.4

15.2

—

tWH2,

tWL2

X0A

—

30.5

—

µs

Input clock

rising time and

falling time

tCR,

tCF

X0, X0A

X1: open

—

When an external clock is used

X0, X1,

X0A, X1A

*—

—

CR oscillation

start time

tCRHWK

—

µs

When the main CR clock is used

tCRLWK

—

µs

When the sub-CR clock is used

PLL oscillation

start time

tMCRPLLW

—

100

µs

When the main CR PLL clock is

used

MB95F613K Datasheet(PDF) 84 Page - Cypress Semiconductor

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