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MB95F613K Datasheet(PDF) 43 Page - Cypress Semiconductor |
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MB95F613K Datasheet(HTML) 43 Page - Cypress Semiconductor |
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43 / 110 page ![]() Document Number: 002-04698 Rev. *A Page 43 of 110 PRELIMINARY MB95610H Series 15.2.3 Port 1 registers ■ Port 1 register functions *: If the pin is an N-ch open drain pin, the pin state becomes Hi-Z. ■ Correspondence between registers and pins for port 1 *: Though P12 has no pull-up function, bit2 in the PUL1 register can still be accessed. The operation of P12 is not affected by the setting of bit2 in the PUL1 register. Register abbreviation Data Read Read by read-modify-write (RMW) instruction Write PDR1 0 Pin state is “L” level. PDR1 value is “0”. As output port, outputs “L” level. 1 Pin state is “H” level. PDR1 value is “1”. As output port, outputs “H” level.* DDR1 0 Port input enabled 1 Port output enabled PUL1 0 Pull-up disabled 1 Pull-up enabled Correspondence between related register bits and pins Pin name - - P15 P14 P13 P12 - - PDR1 - - bit5 bit4 bit3 bit2* - - DDR1 PUL1 |
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