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MIC4607 Datasheet(PDF) 19 Page - Microchip Technology

No. de pieza MIC4607
Descripción Electrónicos  85V, Three-Phase MOSFET Driver with Adaptive Dead-Time, Anti-Shoot-Through and Overcurrent Protection
PDF  42 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MIC4607 Datasheet(HTML) 19 Page - Microchip Technology

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 2016 Microchip Technology Inc.
DS20005610A-page 19
MIC4607
4.4
Overcurrent Timing Diagram
The motor current is sensed in an external resistor that
is connected between the low-side MOSFET’s source
pins and ground. If the sense resistor voltage exceeds
the rising overcurrent threshold (typically 0.2V), all LO
and HO outputs are latched off and the FLT/ pin is
pulled low. Once the outputs are latched off, an internal
current source (typically 0.44 μA) begins to charge up
the external CDLY capacitor. The outputs remain
latched off and all xLI/xHI (or xPWM) input signals are
ignored until the voltage on the CDLY capacitor rises
above the VDLY+ threshold (typically 1.5V), which
resets the latch on the first rising edge of any LI input of
the MIC4607-1 (or falling edge on any PWM input for
the MIC4607-2).
Once this occurs, the CDLY capacitor is discharged, the
FLT/ pin returns to a high impedance state and all out-
puts will respond to their respective input signals.
On startup, the current limit latch is reset during a rising
VDD or a rising EN pin voltage to assure normal opera-
tion.
FIGURE 4-4:
Overcurrent Timing Diagram.



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