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LAN8741Ai-EN Datasheet(PDF) 59 Page - Microchip Technology |
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LAN8741Ai-EN Datasheet(HTML) 59 Page - Microchip Technology |
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59 / 106 page ![]() 2013-2015 Microchip Technology Inc. DS00001988A-page 59 LAN8741A/LAN8741Ai 4.2.14 SPECIAL MODES REGISTER Note 1: The default value of this field is determined by the RMIISEL configuration strap. Refer to Section 3.7.3, "RMIISEL: MII/RMII Mode Configuration" for additional information. 2: The default value of this field is determined by the MODE[2:0] configuration straps. Refer to Section 3.7.2, "MODE[2:0]: Mode Configuration" for additional information. 3: The default value of this field is determined by the PHYAD[0] configuration strap. Refer to Section 3.7.1, "PHYAD[2:0]: PHY Address Configuration" for additional information. Index (In Decimal): 18 Size: 16 bits Bits Description Type Default 15 RESERVED RO - 14 MIIMODE Reflects the mode of the digital interface: 0 = MII mode 1 = RMII mode RO (see Note 1) 13:8 RESERVED RO - 7:5 MODE Transceiver mode of operation. Refer to Section 3.7.2, "MODE[2:0]: Mode Configuration" for additional details. R/W NASR (see Note 2) 4:0 PHYAD PHY Address. The PHY Address is used for the SMI address and for initializa- tion of the Cipher (Scrambler) key. Refer to Section 3.7.1, "PHYAD[2:0]: PHY Address Configuration" for additional details. R/W NASR (see Note 3) |
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