Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

Preview PDF HTML

PC87591L Datasheet(PDF) 97 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza PC87591L
Descripción Electrónicos  LPC Mobile Embedded Controllers
PDF  437 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87591L Datasheet(HTML) 97 Page - National Semiconductor (TI)

Back Button PC87591L Datasheet HTML 93Page - National Semiconductor (TI) PC87591L Datasheet HTML 94Page - National Semiconductor (TI) PC87591L Datasheet HTML 95Page - National Semiconductor (TI) PC87591L Datasheet HTML 96Page - National Semiconductor (TI) PC87591L Datasheet HTML 97Page - National Semiconductor (TI) PC87591L Datasheet HTML 98Page - National Semiconductor (TI) PC87591L Datasheet HTML 99Page - National Semiconductor (TI) PC87591L Datasheet HTML 100Page - National Semiconductor (TI) PC87591L Datasheet HTML 101Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 97 / 437 page
background image
Embedded Controller Modules (Continued)
Revision 1.07
97
www.national.com
4.2.9
Usage Hints
●
Do not write to ADCAn, ADCBn or BLTCn and do not change the value of TCS, IND, DIR, OT, ADA, INCA, ADB and
INCB fields of DMACNTLn register while the associated channel is active (CHAC bit in DMASTATn register is 1).
When initializing these registers, write to BLTCn register last, since writing to BLTCn register activates the channel
immediately (if CHEN bit in DMACNTLn register is set to 1).
●
The ADRAn, ADRBn and BLTRn registers store transfer parameters (source address, destination address and block
length) for the next data block to be transferred, for either Auto-Initialize or Double-Buffer modes of operation. When
initializing these registers, write the BLTRn register last, since this validates the next block’s parameters (VLD bit in
DMASTATn register is set to 1).
●
The TCS bit in DMACNTLn register is programed according to the bus width of the devices. It determines how many
bytes are transferred in each DMA bus cycle.
●
The DMAC does not support non-aligned transfers. The values written to ADCAn, ADRAn, ADCBn and ADRBn must
be multiples of the Transfer Cycle Size (as defined by TCS bit in DMACNTLn register).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com