MAX1102 datasheet(10/16 Pages) MAXIM

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Output Buffer

The MAX1102/MAX1103/MAX1104 analog output is

internally buffered by a precision unity-gain buffer that

slews at 1.2V/µs (typ). The output swings from GND to

VDD - 0.1V. With a 0 to VDD - 0.1V (or VDD - 0.1V to 0)

output transition, the amplifier output typically settles to

1/2LSB in 11µs when loaded with 10k

Ω in parallel with

100pF.

The buffer amplifier is stable with any combination of

resistive (

≥ 10kΩ) or capacitive (≤ 100pF) loads.

8-Bit CODECs

______________________________________________________________________________________

AOUT

SCLK

DOUT

DIN

AIN

t10

t11

MSB

CONTROL WORD

LSB

MSB

CONVERSION RESULT

LSB

tconv

input sampling instant

ADC CONVERSION CYCLE (ADC PREVIOUSLY ENABLED. DAC DISABLED)

Figure 4a. Serial Interface Timing Diagram. ADC enabled and DAC disabled.

VDD

AOUT

SCLK

DOUT

DIN

MSB

CONTROL WORD

LSB

MSB

DAC DATA

LSB

twake-up

tsettling

Figure 4b. Serial Interface Timing Diagram. ADC disabled and DAC disabled.

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