LTC1861_15 datasheet(10/16 Pages) LINER

No. de pieza	LTC1861

Descripción Electrónicos	Power, 12-Bit, 250ksps 1- and 2-Channel ADCs in MSOP

PDF	16 Pages

Scroll/Zoom	100%

Fabricante Electrónico	LINER [Linear Technology]

Página de inicio	http://www.linear.com

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10 / 16 page

LTC1860/LTC1861

18601fa

FUNCTIONAL BLOCK DIAGRAM

TEST CIRCUITS

Load Circuit for tdDO, tr, tf, tdis and ten

Voltage Waveforms for SDO Rise and Fall Times, tr, tf

Voltage Waveforms for SDO Delay Times, tdDO and thDO

Voltage Waveforms for ten

Voltage Waveforms for tdis

1860/61 BD

12-BIT

SAMPLING

ADC

BIAS AND

SHUTDOWN

CONVERT

CLK

SERIAL

PORT

12-BITS

IN+

(CH0)

IN–

(CH1)

VCC

VREF

SDO

GND

CONV (SDI) SCK

PIN NAMES IN

PARENTHESES

REFER TO LTC1861

DATA OUT

DATA IN

–

SDO

20pF

TEST POINT

VCC tdis WAVEFORM 2, ten

tdis WAVEFORM 1

1860 TC01

SDO

1860 TC04

VOH

VOL

1860 TC03

CONV

SDO

ten

SCK

SDO

VIL

tdDO

thDO

VOH

VOL

1860 TC02

SDO

WAVEFORM 1

(SEE NOTE 1)

VIH

tdis

90%

10%

SDO

WAVEFORM 2

(SEE NOTE 2)

CONV

NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH

THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL

NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH

THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL

1860 TC05

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