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AN4374 Datasheet(PDF) 22 Page - STMicroelectronics |
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AN4374 Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 25 page ![]() PCB layout guidelines AN4374 22/25 DocID025366 Rev 2 example, with 1 MHz CLK frequency, an adequate value could be 15 ns (e.g. 100 Ohm + 150 pF). Figure 21. Interface signal filtering Radiated emission reduction (EMI) – In order to decrease the electromagnetic noise during LED power-on/off, the driver output lines should follow the shortest path "power rail/LED/driver". Besides, in order to keep the system stability, a good electrolytic capacitor should be connected to the power supply rail as near as possible the LED anodes (the inductive LED power supply rail component should be compensated by added capacitance; in case of wide PCB, place more distributed capacitors). Another filter capacitor must be added to each driver power supply pin (VDD). – Shorten as minimum as possible the SPI connection strips (from controller to LED driver). Device thermal management – In order to improve the power dissipation (to decrease the device working temperature), solder the package exposed pad (if available) to the board. – In order to improve the thermal performance at least a 4-layer (e.g. 2S2P) PCB should be used. – The copper area below the package thermal pad should be as large as possible, outside the package perimeter (using the package sides without pins). – A reasonable number of vias must connect the copper area below the package to all available PCB layers especially just below the device package (e.g. 3x3 or 4x3 vias array) but also outside the package perimeter. Smaller and closely spaced poor signal good signal CLK, LE, etc. CLK, LE, etc. Proper filtering to improve digital signal quality AM16870v1 |
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