Device description and operation

L6743D

8/16

4

Device description and operation

L6743D provides high-current driving control for both high-side and low-side N-channel

MOSFETS connected as step-down DC-DC converter driven by an external PWM signal.

The integrated high-current drivers allow using different types of power MOSFETs (also

The driver for the high-side MOSFET use BOOT pin for supply and PHASE pin for return.

The driver for the low-side MOSFET use the VCC pin for supply and PGND pin for return.

The driver embodies a anti-shoot-through and adaptive dead-time control to minimize low-

side body diode conduction time maintaining good efficiency saving the use of Schottky

diodes: when the high-side MOSFET turns off, the voltage on its source begins to fall; when

the voltage reaches about 2 V, the low-side MOSFET gate drive voltage is suddenly applied.

When the low-side MOSFET turns off, the voltage at LGATE pin is sensed. When it drops

below about 1 V, the high-side MOSFET gate drive voltage is suddenly applied. If the

current flowing in the inductor is negative, the source of high-side MOSFET will never drop.

To allow the low-side MOSFET to turn-on even in this case, a watchdog controller is

enabled: if the source of the high-side MOSFET doesn't drop, the low-side MOSFET is

switched on so allowing the negative current of the inductor to recirculate. This mechanism

allows the system to regulate even if the current is negative.

Before VCC to overcome the UVLO threshold, L6743D keeps firmly-OFF both high-side and

low-side MOSFETS then, after the UVLO has been crossed, the EN and PWM inputs take

the control over driver’s operations. EN pin enables the driver: if low will keep all MOSFET

OFF (HiZ) regardless of the status of PWM. When EN is high, the PWM input takes the

control: if left floating, the internal resistor divider sets the HiZ State: both MOSFETS are

kept in the OFF state until PWM transition.

After UVLO crossing and while in HiZ, the preliminary-OV protection is activated: if the

voltage senses through the PHASE pin overcomes about 1.8 V, the low-side MOSFET is

latched ON in order to protect the load from dangerous over-voltage. The driver status is

reset from a PWM transition.

Driver power supply as well as power conversion input are flexible: 5 V and 12 V can be

chosen for high-side and low-side MOSFET voltage drive.

Figure 4.

Timing diagram (EN = high)

HiZ Window

PWM

HS Gate

LS Gate

HiZ Window