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A43L0616AV Datasheet(PDF) 9 Page - AMIC Technology |
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A43L0616AV Datasheet(HTML) 9 Page - AMIC Technology |
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9 / 45 page ![]() A43L0616A (May, 2001, Version 1.0) 8 AMIC Technology, Inc. Operating AC Parameter (AC operating conditions unless otherwise noted) Version Symbol Parameter CAS Latency -5 -5.5 -6 -7 Unit Note tRRD(min) Row active to row active delay 10 11 12 14 ns 1 tRCD(min) RAS to CAS delay 15 17 18 20 ns 1 tRP(min) Row precharge time 15 17 18 20 ns 1 tRAS(min) 40 42 42 42 ns 1 tRAS(max) Row active time 100 µs tRC(min) Row cycle time 55 60.5 60 63 ns 1 tCDL(min) Last data in new col. Address delay 1 CLK 2 tRDL(min) Last data in row precharge 2 2 2 2 CLK 2 tBDL(min) Last data in to burst stop 1 CLK 2 tCCD(min) Col. Address to col. Address delay 1 CLK 3 2 CLK 4 Number of valid output data 2 1 CLK Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next higher integer. 2. Minimum delay is required to complete write. 3. All parts allow every cycle column address change. 4. In case of row precharge interrupt, auto precharge and read burst stop. |
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