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JS28F256P33BFE Datasheet(PDF) 37 Page - Micron Technology

No. de pieza JS28F256P33BFE
Descripción Electrónicos  NumonyxTM StrataFlash Embedded Memory
PDF  90 Pages
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Fabricante Electrónico  MICRON [Micron Technology]
Página de inicio  http://www.micron.com
Logo MICRON - Micron Technology

JS28F256P33BFE Datasheet(HTML) 37 Page - Micron Technology

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Datasheet
Aug 2009
37
Order Number:320003-08
P33-65nm
11.1.3
End of Word Line (EOWL) Considerations
End of Wordline (EOWL) WAIT states can result when the starting address of the burst
operation is not aligned to a 16-word boundary; that is, A[3:0] of start address does
not equal 0x0. Figure 11, “End of Wordline Timing Diagram” on page 37 illustrates the
end of wordline WAIT state(s), which occur after the first 16-word boundary is reached.
The number of data words and the number of WAIT states is summarized in Table 13,
“End of Wordline Data and WAIT state Comparison” on page 38for both P33-130nm
and P33-65nm devices.
Figure 10: Example Latency Count Setting Using Code 3
CLK
CE#
ADV#
A[MAX:0]
D[15:0]
t
Data
Code 3
Address
Data
01
2
34
R103
High-Z
A[MAX:1]
Figure 11: End of Wordline Timing Diagram
A[Max:1]
ADV#
OE#
WAIT
DQ[15:0]
Data
Data
Data
EOW L
CLK
Latency Count
Address



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