H3LIS331DL datasheet(26/38 Pages) STMICROELECTRONICS

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H3LIS331DL

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The BOOT bit is used to refresh the content of the internal registers stored in the Flash

memory block. At device power-up, the content of the Flash memory block is transferred to

the internal registers related to trimming functions in order to permit correct operation of the

device itself. If for any reason the content of the trimming registers is changed, it is sufficient

to use this bit to restore the correct values. When the BOOT bit is set to ‘1’, the content of

the internal Flash is copied inside the corresponding internal registers and it is used to

calibrate the device. These values are factory trimmed and they are different for every

accelerometer. They permit correct operation of the device and normally they do not have to

be changed. At the end of the boot process the BOOT bit is set again to ‘0’.

HPCF[1:0]. These bits are used to configure the high-pass filter cutoff frequency ft which is

given by:

The equation can be simplified to the following approximated equation:

HPen1

High-pass filter enabled for interrupt 1 source. Default value: 0

(0: filter bypassed; 1: filter enabled)

HPCF1,

HPCF0

High-pass filter cutoff frequency configuration. Default value: 00

(00: HPc=8; 01: HPc=16; 10: HPc=32; 11: HPc=64)

Table 23. High-pass filter mode configuration

HPM1

HPM0

High-pass filter mode

Normal mode (reset reading HP_RESET_FILTER)

Reference signal for filtering

Normal mode (reset reading HP_RESET_FILTER)

Table 24. High-pass filter cutoff frequency configuration

HPcoeff2,1

ft [Hz]

Data rate = 50 Hz

ft [Hz]

Data rate = 100 Hz

ft [Hz]

Data rate = 400 Hz

ft [Hz]

Data rate = 1000 Hz

0.5

0.25

0.5

0.125

0.25

2.5

Table 22. CTRL_REG2 description (continued)

HPc

------------

–



 fs



------



6HPc



-------------------

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