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AD9826 Datasheet(PDF) 2 Page - Analog Devices

No. de pieza AD9826
Descripción Electrónicos  Complete 16-Bit Imaging Signal Processor
PDF  20 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD9826 Datasheet(HTML) 2 Page - Analog Devices

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REV. A
AD9826–SPECIFICATIONS
ANALOG SPECIFICATIONS
Parameter
Min
Typ
Max
Unit
MAXIMUM CONVERSION RATE
3-Channel Mode with CDS
30
MSPS
2-Channel Mode with CDS
30
MSPS
1-Channel Mode with CDS
18
MSPS
ACCURACY (ENTIRE SIGNAL PATH)
ADC Resolution
16
Bits
Integral Nonlinearity (INL)
±16
LSB
Differential Nonlinearity (DNL)
±0.5
LSB
No Missing Codes
Guaranteed
ANALOG INPUTS
Input Signal Range (Programmable)
1
2.0/4.0
V p-p
Allowable Reset Transient
1
1.0
V
Input Limits
2
AVSS – 0.3
AVDD + 0.3
V
Input Capacitance
10
pF
Input Bias Current
10
nA
AMPLIFIERS
PGA Gain
1
6
V/V
PGA Gain Resolution
2
64
Steps
PGA Gain Monotonicity
Guaranteed
Programmable Offset
–300
+300
mV
Programmable Offset Resolution
512
Steps
Programmable Offset Monotonicity
Guaranteed
NOISE AND CROSSTALK
Total Output Noise @ PGA Minimum
3.0
LSB rms
Total Output Noise @ PGA Maximum
9.0
LSB rms
Channel-to-Channel Crosstalk
@ 15 MSPS
70
dB
@ 6 MSPS
90
dB
POWER SUPPLY REJECTION
AVDD = 5 V
0.25 V
0.1
% FSR
DIFFERENTIAL VREF (at 25
°C)
CAPT–CAPB
2.0
V
TEMPERATURE RANGE
Operating
–40
+85
°C
Storage
–65
+150
°C
POWER SUPPLIES
AVDD
4.75
5.0
5.25
V
DRVDD
3.0
5.0
5.25
V
OPERATING CURRENT
AVDD
75
mA
DRVDD
5
mA
Power-Down Mode
200
µA
POWER DISSIPATION
3-Channel Mode
400
mW
1-Channel Mode
300
mW
NOTES
1Linear Input Signal Range is from 0 V to 4 V when the CCD’s reference level is clamped to 4 V by the AD9826’s input clamp.
4V SET BY INPUT CLAMP
(3V OPTION ALSO AVAILABLE)
1V TYP
RESET TRANSIENT
4V p-p MAX INPUT SIGNAL RANGE
GND
2The PGA Gain is approximately “linear in dB” and follows the equation: Gain =
6.0
1 + 5.0
63 – G
63
where G is the register value.
Specifications subject to change without notice.
(TMIN to TMAX, AVDD = 5 V, DRVDD = 5 V, CDS Mode, fADCCLK = 15 MHz, fCDSCLK1 = fCDSCLK2 = 5 MHz, PGA
Gain = 1, Input range = 4 V p-p, unless otherwise noted.)



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