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SPC56AP54X Datasheet(PDF) 90 Page - STMicroelectronics |
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SPC56AP54X Datasheet(HTML) 90 Page - STMicroelectronics |
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90 / 104 page ![]() Electrical characteristics SPC56xP54x, SPC56xP60x 90/104 Doc ID 18340 Rev 3 Figure 27. Nexus TDI, TMS, TDO timing 3.18.4 External interrupt timing (IRQ pin) TDO 6 7 TMS, TDI 8 TCK 9 Table 40. External interrupt timing(1) No. Symbol C Parameter Conditions Min Max Unit 1tIPWL CC D IRQ pulse width low — 4 — tCYC 2tIPWH CC D IRQ pulse width high — 4 — tCYC 3tICYC CC D IRQ edge to edge time(2) —4 + N (3) —tCYC 1. IRQ timing specified at fSYS = 64 MHz and VDD_HV_IOx = 3.0 V to 5.5 V, TA = TL to TH, and CL = 200pF with SRC = 0b00. 2. Applies when IRQ pins are configured for rising edge or falling edge events, but not both. 3. N= ISR time to clear the flag. |
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