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CXD3003 Datasheet(PDF) 16 Page - Sony Corporation

No. de pieza CXD3003
Descripción Electrónicos  CD Digital Signal Processor with Built-in Digital Servo and DAC
PDF  137 Pages
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Fabricante Electrónico  SONY [Sony Corporation]
Página de inicio  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXD3003 Datasheet(HTML) 16 Page - Sony Corporation

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CXD3003R
[1] CPU Interface
§1-1. CPU Interface Timing
• CPU interface
This interface uses DATA, CLOK and XLAT to set the modes.
The interface timing chart is shown below.
• The internal registers are initialized by a reset when XRST = 0.
§1-2. CPU Interface Command Table
Total bit length for each register
Register
0 to 2
3
4 to 6
7
8
9
A
B
C
D
E
8 bits
8 to 24 bits
16 bits
20 bits
24 bits
20 bits
28 bits
20 bits
16 bits
20 bits
20 bits
Total bit length
30ns or more
D18
D19
D20
D21
D22
D23
750ns or more
Valid
CLOK
DATA
XLAT
Registers
D0
D1



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