Advance Information

2 Megabit LPC Flash

SST49LF020

21

©2001 Silicon Storage Technology, Inc.

S71175-02-000

5/01

526

0000b

010Xb

1111b

1111b

1011b

1100b

0001b

0000b

0000b

1111b

0000b

Tri-State

TAR

Load Address "FFBC0100(hex)" in 8 Clocks

Note: Read the DQ[4:0] to capture the states (High or Low) of the GPI[4:0] input pins. The DQ[7:5] are reserved pins.

Address

1 Clock 1 Clock

Start

Memory

Read

Cycle

TAR

Sync

Data

Start next

1 Clock

Data out 2 Clocks

1 Clock

2 Clocks

0000b

D[3:0]

D[7:4]

0000b

526 ILL F24.1

RST#

LFRAME#

LAD[3:0]

LCLK

CE#

LCLK

VDD

RST#/INIT#

LFRAME#

LAD[3:0]

526 ILL F25.0

TPRST

TKRST

TRSTP

TRSTF

TRST