AS3421 datasheet(33/61 Pages) AMSCO

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AS3421 AS3422

Datasheet - R e g i s t e r D e s c r i p t i o n

Table 21. SYSTEM Register

Name

Base

Default

SYSTEM

2-wire serial

31h

Offset: 20h

SYSTEM Register

This register is reset at a POR.

Bit

Bit Name

Default

Access

Bit Description

7:4

Design_Version<3:0>

1001

AFE number to identify the design version

1001: for chip version 1v1

TESTREG_ON

R/W

0: normal operation

1: enables writing to test register 3Eh & 3Fh to configure the OTP and set

the access mode.

MONITOR_ON

R/W

Enables the monitor mode

0: normal operation

1: monitor mode enabled

CONT_PWRUP

R/W

Continues the automatic power-up sequence when using the I2C mode

0: chip stops the power-up sequence after the supplies are stable,

switching on individual blocks has to be done via I2C commands

1: automatic power-up sequence is continued

PWR_HOLD

R/W

0: power up hold is cleared and AFE will power down

1: is automatically set to on after power on

Table 22. PWR_SET Register

Name

Base

Default

PWR_SET

2-wire serial

0x11 1111b (stand alone mode)

0x00 0000b (I2C mode)

Offset: 21h

Power Setting Register

Please be aware that writing to this register will enable/disable the corresponding blocks,

while reading gets the actual status. It is not possible to read back e.g ILED settings. This

Bit

Bit Name

Default

Access

Bit Description

PWR_REG_ON

R/W

Defines which register is used for the power settings.

0: all blocks stay on as defined in the start-up sequence

1: register 21h is used

LOW_BAT

VBAT supervisor status

0: VBAT is above brown out level

1: BVDD has reached brown out level

PWRUP_COMPLETE

Power-Up sequencer status

0: power-up sequence incomplete

1: power-up sequence completed

HP_ON

0: switches HP stage off

1: switches HP stage on

0: HP stage not powered

1: normal operation

MIC_ON

0: switches microphone stage off

1: switches microphone stage on

0: microphone stage not powered

1: normal operation

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