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AD8222BCPZ-R7 Datasheet(PDF) 14 Page - Analog Devices |
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AD8222BCPZ-R7 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 24 page ![]() AD8222 Rev. A | Page 14 of 24 15 10 5 0 0 5 10 15 20 OUTPUT VOLTAGE STEP SIZE (V) SETTLED TO 0.01% SETTLED TO 0.001% Figure 39. Settling Time vs. Step Size (G = 1) 1 10 100 SETTLED TO 0.01% SETTLED TO 0.001% 1k GAIN 1k 10 100 1 Figure 40. Settling Time vs. Gain for a 10 V Step 200 180 160 140 120 100 80 60 11M 100k 10k 1k 100 10 FREQUENCY (Hz) GAIN = 1 GAIN = 1000 SOURCE VOUT SMALLER TO AVOID SLEW RATE LIMIT SOURCE VOUT = 20V p-p THERMAL CROSSTALK VARIES WITH LOAD Figure 41. Channel Separation vs. Frequency, RL = 2 kΩ, Source Channel at G = 1 100 10k 1k 100k 1M 10M FREQUENCY (Hz) 60 –40 –20 0 20 40 GAIN = 1000 GAIN = 100 GAIN = 10 GAIN = 1 Figure 42. Differential Output Configuration: Gain vs. Frequency 1 10k 1k 100 10 100k 1M FREQUENCY (Hz) 100 90 80 70 60 50 40 30 20 10 0 LIMITED BY MEASUREMENT SYSTEM OUTPUT BALANCE = 20 log VDIFF_OUT VCM_OUT Figure 43. Differential Output Configuration: Output Balance vs. Frequency |
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