List of figures

STCD1020, STCD1030, STCD1040

4/40

Doc ID 13823 Rev 6

List of figures

Figure 1.

Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 2.

Connections diagram (STCD1020, 2-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 3.

Connections diagram (STCD1030, 3-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4.

Connections diagram (STCD1040, 4-channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 5.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 6.

Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 7.

Typical application circuit using STCD1040 for RF ends of TD-SCDMA/GSM dual-mode

mobile phone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 8.

Typical application circuit using STCD1040 for baseband peripherals in mobile phone . . 13

Figure 9.

Direct connection of the source clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10.

Connection of the DC-CUT capacitor and bias. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 11.

EN1=EN2=EN3=EN4=1, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 12.

Quiescent current (IQ) vs. temperature (STCD1040, 2.8 V version,

Figure 13.

EN1=EN2=EN3=EN4=0, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 14.

EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input from TCXO) . . . . . . . . . . 20

Figure 15.

Active current (IACT) vs. master clock input voltage level (Vpp) (STCD1040, 2.8 V version,

EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input) . . . . . . . . . . . . . . . . . . . . 21

Figure 16.

Active current (IACT) vs. input frequency (STCD1040, 2.8 V version,

EN1=EN2=EN3=EN4=1, master clock input Vpp = 1 V) . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 17.

STCD10x0 recovery time from standby to active (STCD1040, 2.8 V version,

EN2=EN3=EN4=0, measure CLK1 when EN1 from 0 to 1) . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 18.

STCD10x0 buffer recovery time from off to on (STCD1040, 2.8 V version,

EN2=EN3=EN4=1, measure CLK1 when EN1 from 0 to 1) . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 19.

Sine wave input clock vs. output clock (STCD1040, 2.8 V version, 26 MHz sine wave

master clock input from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 20.

Rise and fall time for square wave output (STCD1040, 2.8 V, 10 MHz square wave

master clock input, CL = 20 pF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 21.

Input clock phase noise (STCD1040, 2.8 V version, 26 MHz master clock

input from TCXO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 22.

Output clock phase noise (STCD1040, 2.8V version, this phase noise includes the

additive phase noise from TCXO and STCD1040) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 23.

Figure 24.

EN1=EN2=EN3=EN4=1, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 25.

Quiescent current (IQ) vs. temperature (STCD1040, 1.8 V version,

Figure 26.

EN1=EN2=EN3=EN4=0, no master clock input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 27.

EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input from TCXO) . . . . . . . . . . 26

Figure 28.

Active current (IACT) vs. master clock input voltage level (Vpp) (STCD1040, 1.8 V version,

EN1=EN2=EN3=EN4=1, 26 MHz sine wave master clock input) . . . . . . . . . . . . . . . . . . . . 26

Figure 29.

Active current (IACT) vs. input frequency (STCD1040, 1.8 V version,

EN1=EN2=EN3=EN4=1, master clock input Vpp=1 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27