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910GL Datasheet(PDF) 161 Page - Intel Corporation |
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910GL Datasheet(HTML) 161 Page - Intel Corporation |
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161 / 426 page ![]() Host-PCI Express* Bridge Registers (D1:F0) (Intel® 82915G/82915P/82915PL Only) R Datasheet 161 8.1.43 RSTS—Root Status (D1:F0) PCI Device: 1 Address Offset: C0h Default Value: 00000000h Access: RO, R/W/C Size: 32 bits This register provides information about PCI Express Root Complex specific parameters. Bit Access & Default Description 31:18 Reserved 17 RO 0b PME Pending: This bit indicates that another PME is pending when the PME Status bit is set. When the PME Status bit is cleared by software; the PME is delivered by hardware by setting the PME Status bit again and updating the Requestor ID appropriately. The PME pending bit is cleared by hardware if no more PMEs are pending. 16 R/W/C 0b PME Status: This bit indicates that the requestor ID indicated in the PME Requestor ID field asserted PME. Subsequent PMEs are kept pending until the status register is cleared by writing a 1 to this field. 15:0 RO 0000h PME Requestor ID: This field indicates the PCI requestor ID of the last PME requestor. |
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