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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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910GL Datasheet(PDF) 118 Page - Intel Corporation |
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910GL Datasheet(HTML) 118 Page - Intel Corporation |
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118 / 426 page  DMIBAR Registers—Direct Media Interface (DMI) RCRB R 118 Datasheet 7.1.5 DMIVC0RCAP—DMI VC0 Resource Capability MMIO Range: DMIBAR Address Offset: 010h Default Value: 00000001h Access: RO Size: 32 bits Bit Access & Default Description 31:24 RO 00h Port Arbitration Table Offset (AT): This VC implements no port arbitration table since the arbitration is fixed. 23 Reserved 22:16 RO 00h Maximum Time Slots (MTS): This VC implements fixed arbitration, and therefore this field is not used. 15 RO 0b Reject Snoop Transactions (RTS): This VC must be able to take snoopable transactions. 14 RO 0b Advanced Packet Switching (APS): This VC is capable of all transactions, not just advanced packet switching transactions. 13:8 Reserved 7:0 RO 01h Port Arbitration Capability (PAC): This field indicates that this VC uses fixed port arbitration. |
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