910GL datasheet(116/426 Pages) INTEL

116 / 426 page

DMIBAR Registers—Direct Media Interface (DMI) RCRB

116

Datasheet

7.1

Direct Media Interface (DMI) RCRB Register Details

7.1.1

DMIVCECH—DMI Virtual Channel Enhanced Capability

Header

MMIO Range:

DMIBAR

Address Offset:

000h

Default Value:

04010002h

Access:

Size:

32 bits

This register indicates DMI Virtual Channel capabilities.

Bit

Access &

Default

Description

31:20

040h

Pointer to Next Capability: This field indicates the next item in the list.

19:16

Capability Version: This field indicates support as a version 1 capability

structure.

15:0

0002h

Capability ID: This field indicates this is the Virtual Channel capability item.

7.1.2

DMIPVCCAP1—DMI Port VC Capability Register 1

MMIO Range:

DMIBAR

Address Offset:

004h

Default Value:

00000001h

Access:

R/WO, RO

Size:

32 bits

This register describes the configuration of Virtual Channels associated with this port.

Bit

Access &

Default

Description

31:12

Reserved

11:10

00b

Port Arbitration Table Entry Size (PATS): This field indicates the size of the

port arbitration table is 4 bits (to allow up to 8 ports).

9:8

00b

Reference Clock (RC)

Fixed at 10 ns.

Reserved

6:4

000b

Low Priority Extended VC Count (LPEVC): This field indicates that there are

no additional VCs of low priority with extended capabilities.

Reserved

2:0

R/WO

001b

Extended VC Count: This field indicates that there is one additional VC (VC1)

that exists with extended capabilities.

910GL Datasheet(PDF) 116 Page - Intel Corporation

910GL Datasheet(HTML) 116 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL