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910GL Datasheet(PDF) 113 Page - Intel Corporation |
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910GL Datasheet(HTML) 113 Page - Intel Corporation |
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113 / 426 page ![]() EPBAR Registers—Egress Port Register Summary R Datasheet 113 6.1.5 EPLE2A—EP Link Entry 2 Address MMIO Range: EPBAR Address Offset: 068h Default Value: 0000000000008000h Access: RO Size: 64 bits This register provides the second part of a Link Entry that declares an internal link to another Root Complex Element. Bit Access & Default Description 63:28 Reserved 27:20 RO 00h Bus Number 19:15 RO 0 0001b Device Number: Target for this link is PCI Express* x16 port (Device 1). 14:12 RO 000b Function Number 11:0 Reserved § |
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