PIC16F688_09 datasheet(20/204 Pages) MICROCHIP

20 / 204 page

PIC16F688

DS41203E-page 18

2.2.2.6

PCON Register

The Power Control (PCON) register (see Register 2-6)

contains flag bits to differentiate between a:

• Power-on Reset (POR)

• Brown-out Reset (BOR)

• Watchdog Timer Reset (WDT)

• External MCLR Reset

The PCON register also controls the Ultra Low-Power

Wake-up and software enable of the BOR.

PCON: POWER CONTROL REGISTER

U-0

R/W-0

R/W-1

U-0

R/W-0

R/W-x

—

ULPWUE

SBOREN(1)

—

—POR

BOR

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-6

Unimplemented: Read as ‘0’

bit 5

ULPWUE: Ultra Low-Power Wake-up Enable bit

= Ultra low-power wake-up enabled

= Ultra low-power wake-up disabled

bit 4

SBOREN: Software BOR Enable bit(1)

= BOR enabled

= BOR disabled

bit 3-2

Unimplemented: Read as ‘0’

bit 1

POR: Power-on Reset Status bit

= No Power-on Reset occurred

= A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)

bit 0

BOR: Brown-out Reset Status bit

= No Brown-out Reset occurred

= A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)

Note 1:

BOREN<1:0> = 01 in the Configuration Word register for this bit to control the BOR.

PIC16F688 Datasheet(PDF) 20 Page - Microchip Technology

PIC16F688 Datasheet(HTML) 20 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL