1.

General description

The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage

register and 3-state outputs. Both the shift and storage register have separate clocks.

The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of

this device in a mixed 3.3 V and 5 V environment.

the device when it is powered down.

Data is shifted on the positive-going transitions of the SHCP input. The data in the shift

register is transferred to the storage register on a positive-going transition of the STCP

input. If both clocks are connected together, the shift register will always be one clock

pulse ahead of the storage register.

The shift register has a serial input (DS) and a serial output (Q7S) for cascading

purposes. It is also provided with asynchronous reset input MR (active LOW) for all 8 shift

register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the

storage register appears at the output whenever the output enable input (OE) is LOW.

2.

Features

−40 °C to +85 °C and −40 °C to +125 °C.

3.

Applications

74LVC595A

8-bit serial-in/serial-out or parallel-out shift register; 3-state

Rev. 01 — 29 May 2007

Product data sheet