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74LVC595A Datasheet(PDF) 4 Page - NXP Semiconductors |
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74LVC595A Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 19 page ![]() 74LVC595A_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 29 May 2007 4 of 19 NXP Semiconductors 74LVC595A 8-bit serial-in/serial-out or parallel-out shift register; 3-state 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 5. Pin configuration SO16 and TSSOP16 Fig 6. Pin configuration DHVQFN16 74LVC595A Q1 VCC Q2 Q0 Q3 DS Q4 OE Q5 STCP Q6 SHCP Q7 MR GND Q7S 001aaf569 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aaf570 74LVC595A Q7 MR Q6 SHCP Q5 STCP Q4 OE Q3 DS Q2 Q0 Transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 terminal 1 index area Table 2. Pin description Symbol Pin Description Q[0:7] 15, 1, 2, 3, 4, 5, 6, 7 parallel data output GND 8 ground (0 V) Q7S 9 serial data output MR 10 master reset (active LOW) SHCP 11 shift register clock input STCP 12 storage register clock input OE 13 output enable input (active LOW) DS 14 serial data input VCC 16 supply voltage |
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