WM9704M

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 3.2 January 2001

24

WAKING UP THE AC-LINK

There are 2 methods for bringing the AC-link out of a low power, halted mode. Regardless of the

method, it is the AC’97 controller that performs the wake up task.

AC-link protocol provides for a “Cold WM9704M Reset”, and a “Warm WM9704M Reset”.

The current powerdown state would ultimately dictate which form of WM9704M reset is appropriate.

Unless a “cold” or “register” reset (a write to the Reset register) is performed, wherein the WM9704M

registers are initialised to their default values, registers are required to keep state during all

powerdown modes.

Once powered down, re-activation of the AC-link via re-assertion of the SYNC signal must not occur

for a minimum of 4 audio frame times following the frame in which the powerdown was triggered.

When AC-link powers up it indicates readiness via the Codec Ready bit (input slot 0, bit 15).

COLD WM9704M RESET

A cold reset is achieved by asserting RESETB for the minimum specified time. By driving RESETB

low, BIT_CLK, and SDATA_OUT will be activated, or re-activated as the case may be, and all the

WM9704M control registers will be initialised to their default power on reset values.

RESETB is an asynchronous WM9704M input.

WARM WM9704M RESET

A warm WM9704M reset will re-activate the AC-link without altering the current WM9704M register

values. A warm reset is signalled by driving SYNC high for a minimum of 1

µs in the absence of

BIT_CLK.

Within normal audio frames SYNC is a synchronous input. In the absence of BIT_CLK, SYNC is

treated as an asynchronous input used in the generation of a warm reset to the WM9704M. The

WM9704M will not respond with the activation of BIT_CLK until SYNC has been sampled low again

by the WM9704M. This will preclude the false detection of a new audio frame.

SERIAL INTERFACE REGISTER MAP DESCRIPTION

(See Table 22)

The serial interface bits perform control functions described as follows: Note that the register map is

fully specified by the AC’97 specification, and this description is simply repeated below, with optional

unsupported features omitted.

RESET REGISTER (INDEX 00H)

Writing any value to this register performs a register reset, which causes all registers to revert to their

default values. Reading this register returns the ID code of the part, indication of modem support (not

supported by the WM9704M) and a code for the type of 3D stereo enhancement.

BIT

FUNCTION

VALUE ON

WM9704M

ID0

Dedicated Mic PCM in channel

0

ID1

Modem line codec support

0

ID2

Bass and treble control

0

ID3

Simulated stereo (mono to stereo)

0

ID4

Headphone out support

0

ID5

Loudness (bass boost) support

0

ID6

18-bit DAC resolution

1

ID7

20-bit DAC resolution

0

ID8

18-bit ADC resolution

1

ID9

20-bit ADC resolution

0

SE4...SE0

3D stereo enhancement technique

11000

Table 9 Reset Register Function