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TPS62060 Datasheet(PDF) 17 Page - Texas Instruments

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No. de pieza TPS62060
Descripción Electrónicos  3-MHz 1.6A Step Down Converter in 2x2 SON Package
PDF  21 Pages
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

TPS62060 Datasheet(HTML) 17 Page - Texas Instruments

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TPS62060
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SLVSA95 – MARCH 2010
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the
power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on
the input can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop
instability or could even damage the part by exceeding the maximum ratings.
Table 3. List of Capacitors
CAPACITANCE
TYPE
SIZE [mm3]
SUPPLIER
10mF
GRM188R60J106M
0603: 1.6 x 0.8 x 0.8
Murata
22mF
GRM188R60G226M
0603: 1.6 x 0.8 x 0.8
Murata
22µF
CL10A226MQ8NRNC
0603: 1.6 x 0.8 x 0.8
Samsung
10µF
CL10A106MQ8NRNC
0603: 1.6 x 0.8 x 0.8
Samsung
CHECKING LOOP STABILITY
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals
•
Switching node, SW
•
Inductor current, IL
•
Output ripple voltage, VOUT(AC)
These are the basic signals that need to be measured when evaluating a switching converter. When the
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the
regulation loop may be unstable. This is often a result of board layout and/or wrong L-C output filter
combinations. As a next step in the evaluation of the regulation loop, the load transient response is tested. The
time between the application of the load transient and the turn on of the P-channel MOSFET, the output
capacitor must supply all of the current required by the load. VOUT immediately shifts by an amount equal to
ΔI(LOAD) x ESR, where ESR is the effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge CO
generating a feedback error signal used by the regulator to return VOUT to its steady-state value. The results are
most easily interpreted when the device operates in PWM mode at medium to high load currents.
During this recovery time, VOUT can be monitored for settling time, overshoot, or ringing; that helps evaluate
stability of the converter. Without any ringing, the loop has usually more than 45° of phase margin.
Copyright © 2010, Texas Instruments Incorporated
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