33730 datasheet(18/27 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33730

FUNCTIONAL DEVICE OPERATION

OPERATION DESCRIPTION

extends the application flexibility of the IC without having to

use an external resistor divider, thus improving the regulator

accuracy over the whole temperature range, and reducing

the component count.

The status of the programming pin can be selected either

by tying the pin to ground (logic level “0”). The logic level “1”

can be selected either by tying the programming pin up (the

programming pin can be tied up to the battery voltage) or by

leaving the pin open.

The programming information is read and latched with the

500

μs delay after the power is applied to the IC.

LOW BATTERY OPERATION

When the battery voltage falls below the specified

minimum value, the 33730 switching regulator will enter a

100% duty cycle mode of operation and its output voltage

VDDH will follow the decreasing battery voltage. If the battery

voltage continues to fall, the VDDH voltage reaches its reset

threshold level, and the RSTH signal will be pulled low, but

the other linear regulators will continue to operate, and their

monitoring signals stay high as long as the VDDH provides

sufficient headroom for the regulators to stay in their

regulation limits (see Figure 6 and Figure 7). If the battery

voltage continues to fall, the linear regulators would not have

sufficient headroom to stay in regulation, and their resets

would be asserted (RSTL, RST3, or both would be pulled

low). At that moment the power down sequence would be

engaged.

The VKAM standby regulator will operate down to (VKAM and

VKAM_DO) and VKAM-DO at the KA_VBAT pin.

POWER SEQUENCING (VDDH, VDD3, VDDL)

VDDH, VDD3, and VDDL are power sequenced by means of

internal pull-down FETs. During the power up sequence,

VDD3 and VDDL will follow VDDH.

During the power down sequence the VDD3 and VDDL

outputs will be pulled down by the internal pull-down power

FETs, and VDDH will be shut off with a defined delay (~100μs

typ.).

In order to engage the power down sequence, the

following conditions have to be met:

(VIGN . REGON) + UVLO = Power Down

The VDD3 output is not power sequenced when used as a

standby regulator.

SENSOR SUPPLIES (VREF1, VREF2)

There are two sensor supplies, VREF1 and VREF2,

integrated into the IC. They are internally connected to VDDH

through power MOSFETs which protect against short to

battery (up to +40V) and short to ground (down to -1V)

conditions.

The VREF outputs have a linearly regulated current limit of

250mA (max.) and their own thermal protection.

Severe fault conditions on the VREF1 and VREF2 outputs,

like shorts to either ground or battery, will not disrupt the

operation of the main regulator VDDH, or cause assertion of

any Reset signal.

IMPORTANT NOTE:

The VREF outputs MUST be externally protected against

transient voltage events with slew rates faster than

2.0V/

μs, otherwise damage to the part may occur. A practical

and inexpensive solution consists of using a series RC

network connected from the VREF output to ground (see

Figures 8 and 9 for typical component values). Other means,

such as a single electrolytic capacitor with its capacitance

value C > 10

μF, may be also used.

PROTECTION FET DRIVE (PFD)

The Protection FET Drive circuit allows using an optional

N-channel protection MOSFET (instead of a standard

reverse protection diode) to protect against a reverse battery

voltage condition. This approach improves the operating

capabilities at very low battery voltages.

An internal charge pump is used to enhance the

Protection FET gate during nominal and low battery

conditions. The charge pump will be enabled at the startup

voltage. When the battery voltage gets sufficiently high, the

Protection FET is turned off and the integrated circuit power

input (VBAT pins) are supplied through the body diode of the

Protection FET.

Use of the Protection FET is not necessary in systems

already using a protection diode, relay or when no reverse

battery protection is required.

CONTROL INPUT (VIGN)

The VIGN pin is used as a control input to the IC. The

regulation circuits will function and draw current from VBAT

when VIGN is high (active) or when the REGON pin is high.

The VIGN pin has a VIHN-IH power-up threshold VIGN-IL typical

power-down threshold) and VIGN-HYS (minimum) of

hysteresis. VIGN is designed to operate up to max VBAT

battery while providing reverse battery and max VBAT load

dump protection.

Table 6. Programming VDD3, VDDL, VKAM Output

Voltage

VDD3

VDDL

VKAM

High

3.3V

2.6V

High

Low

3.3V

High

Low

High

3.3V

1.5V

1.0V

High

Low

3.3V

1.0V

Low

High

3.3V Standby

3.3V

1.0V

Low

High

Low

2.0

3.15V

5.0V

Low

High

2.6V Standby

3.3V

1.0V

Low

2.6V Standby

3.3V

1.5V

The Programming Pins can be tied high to battery voltage

33730 Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc

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