SE97TP datasheet(8/54 Pages) NXP

8 / 54 page

SE97_5

Product data sheet

Rev. 05 — 6 August 2009

8 of 54

NXP Semiconductors

SE97

DDR memory module temp sensor with integrated SPD, 3.3 V

When Tamb ≥ Tth(crit) and Tamb < Tth(crit) − Thys the EVENT output is in Comparator mode

and bit 0 of CONFIG (EVENT output mode) is ignored.

Refer to Table 3 for ﬁgure note information.

Fig 7.

EVENT output condition

002aae324

time

temperature (

°C)

critical

EVENT in Interrupt mode

EVENT in Comparator mode

software interrupt clear

Lower Boundary Alarm

Upper Boundary Alarm

EVENT in ‘Critical Temp only’ mode

(1)

(2)

(1) (3)

(4)

(3)(5)

(6) (4)

(2)

Tamb

Ttrip(l) − Thys

Ttrip(u) − Thys

Tth(crit) − Thys

Ttrip(u) − Thys

Ttrip(l) − Thys

Table 3.

EVENT output condition

Figure

note

EVENT output boundary

conditions

EVENT output

Temperature Register Status bits

Comparator

mode

Interrupt

mode

Critical Temp

only mode

Bit 15

Above

Critical

Trip

Bit 14

Above

Alarm

Window

Bit 13

Below

Alarm

Window

(1)

Tamb ≥ Ttrip(l)

HLH

(2)

Tamb < Ttrip(l) − Thys

(3)

Tamb > Ttrip(u)

(4)

Tamb ≤ Ttrip(u) − Thys

HLH

(5)

Tamb ≥ Tth(crit)

LLL

(6)

Tamb < Tth(crit) − Thys

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