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M16C/1N Datasheet(PDF) 56 Page - Renesas Technology Corp |
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M16C/1N Datasheet(HTML) 56 Page - Renesas Technology Corp |
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56 / 238 page ![]() Rev.1.00 Oct 20, 2004 page 44 of 222 M16C/1N Group 10. Interrupt REJ09B0007-0100Z Reset UART0 reception ________ DBC Oscillation stop detection/watchdog timer Single step Address matched Special Peripheral I/O (Note 1) Figure 10.1 Classification of interrupts Undefined instruction (UND instruction) Overflow (INTO instruction) BRK instruction ______ INT instruction Software Hardware Interrupt Note 1: Peripheral I/O interrupts are generated by the peripheral functions built into the microcomputer system. 10. Interrupt 10.1 Overview of Interrupt 10.1.1 Type of Interrupts Figure 10.1 lists the types of interrupts. • Maskable interrupt : An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or whose interrupt priority can be changed by priority level. • Non-maskable interrupt : An interrupt which cannot be enabled (disabled) by the interrupt enable flag (I flag) or whose interrupt priority cannot be changed by priority level. (Non-maskable interrupt) (Non-maskable interrupt) |
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