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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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HD64F2149YV Datasheet(PDF) 177 Page - Renesas Technology Corp |
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HD64F2149YV Datasheet(HTML) 177 Page - Renesas Technology Corp |
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177 / 1075 page  Section 6 Bus Controller Rev. 3.00 Jan 18, 2006 page 149 of 1044 REJ09B0280-0300 16-Bit Access Space: Figure 6.4 illustrates data alignment control for the 16-bit access space. With the 16-bit access space, the upper data bus (D15 to D8) and lower data bus (D7 to D0) are used for accesses. The amount of data that can be accessed at one time is one byte or one word, and a longword access is executed as two word accesses. In byte access, whether the upper or lower data bus is used is determined by whether the address is even or odd. The upper data bus is used for an even address, and the lower data bus for an odd address. D15 D8 D7 D0 Upper data bus Byte size Word size 1st bus cycle 2nd bus cycle Longword size • Even address Byte size • Odd address Lower data bus Figure 6.4 Access Sizes and Data Alignment Control (16-Bit Access Space) |
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