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M66596FP Datasheet(PDF) 39 Page - Renesas Technology Corp |
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M66596FP Datasheet(HTML) 39 Page - Renesas Technology Corp |
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39 / 131 page ![]() M66596FP/WG rev .1.00 2006.3.14 page 39 of 127 2.10.1 Isochronous errors With this controller, data transfer errors that occur in isochronous transfers can be confirmed using the OVRN bit and the CRCE bit of the FRMNUM register. In isochronous transfers, error notification by the NRDY interrupt can be differentiated using the OVRN bit and the CRCE bit between data buffer errors and packet errors. Table 2.9 and Table 2.10 show the conditions under which the OVRN bit and CRCE bit are set to “1”. Table 2.9 Error information when an NRDY interrupt is issued in an isochronous transfer reciving direction Bit status Issued when: Issue conditions Detected error Operation “OVRN=1" Data packet is received A new data packet is received before reading of buffer memory is completed Reception data buffer overrun The new data packet is thrown out “CRCE=1" Data packet is received A CRC error, or, a bit stuffing error is detected Received packet error The new data is packet thrown out Table 2.10 Error information when an NRDY interrupt is issued in an isochronous transfer sending direction Bit status Issued when: Issue conditions Detected error Operation "OVRN=1" IN token is received An in-token is received before writing to buffer memory is completed Transmission data buffer underrun Zero-Length packet transmission "CRCE=1" Not issued 2.10.2 SOF interrupts and frame numbers The SOFR interrupt operation mode should be selected using the SOFRM bit of the FRMNUM register. Also, the current frame number can be confirmed using the FRNM bit of the FRMNUM register and the UFRNM bit of the UFRNUM register. In the peripheral mode, with this controller, the frame numbers are refreshed at the timing at which SOF packets are received. If the controller is unable to detect an SOF packet because the packet has been corrupted, or for another reason, the FRNM value is retained until a new SOF packet is received. At that point, the FRNM bit based on the SOF interpolation timer is not refreshed. Also, the UFRNM bit is incremented in response to a uSOF packet being received. |
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