STLS2F01 datasheet(13/48 Pages) STMICROELECTRONICS

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STLS2F01

Interface description

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2.6

Interrupt signals

The STLS2F01 processor supports up to 12 external interrupts and one non-maskable

interrupt (NMI). There are 4 PCI interrupt signals, 4 special interrupt signals and 4

configurable GPIO interrupt. In addition, there are 3 internal interrupts, two PCI bus error

report signals and one DDR2 control interrupt. When an interrupt takes place, the processor

handles the exception. Table 6 shows the names, definitions, directions and descriptions of

the interrupt signals.

2.7

JTAG signals

The STLS2F01 provides a JTAG-compliant boundary scan interface. The JTAG interface is

particularly suitable for testing the processor pins for connectivity. The Table 7 provides the

names, definitions, directions and descriptions of the JTAG signals.

2.8

Test and control signals

On the STLS2F01 chip, the test signals are only used for chip physical test, e.g. scan chain

test. When the chip works normally, these signals are set invalid 1.

Table 6.

Interrupt interface signals

Name

Input/output

Description

INTn[3:0]

4 external interrupt signals. OR operations are performed

on these signals with interrupt register from bit 5 to bit 2

separately.

NMIn

NMI. An OR operation is performed on the NOT-value of

this signal and the interrupt register’s 6th bit.

GPIO[3:0]

I/O

These interrupts should be enabled in the interrupt

controller and can be configured as different active power

level and different trigger mode. These interrupts could be

routed to interrupt register bit 0/1.

PCI_IRQ[3:0]

These interrupts should be enabled in the interrupt

controller and low active. These interrupts could be routed

to interrupt register bit 0/1.

PCI_PERR

I/O

PCI bus parity error, high pulse active. These interrupts

could be routed to interrupt register bit 0/1.

PCI_SERR

I/O

PCI bus error, high pulse active. These interrupts could be

routed to interrupt register bit 0/1.

Table 7.

JTAG interface signals

Name

Input/output

Description

TDI

JTAG serial scan data input

TDO

JTAG serial scan data input

TMS

JTAG Command, indicating that the input serial data is a

command.

TCK

TAG serial scan clock

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