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AT89C51ID2-RDTIM Datasheet(PDF) 76 Page - ATMEL Corporation |
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AT89C51ID2-RDTIM Datasheet(HTML) 76 Page - ATMEL Corporation |
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76 / 159 page ![]() 76 AT89C51ID2 4289A–8051–09/03 Registers Table 57. PCON Register PCON (S87:h) Power configuration Register Reset Value= XXXX 0000b 7654 3210 --- POF GF1 GF0 PD IDL Bit Number Bit Mnemonic Description 7-5 - Reserved The value read from these bits is indeterminate. Do not set these bits. 4POF Power-Off Flag Cleared to recognize next reset type. Set by hardware when VCC rises from 0 to its nominal voltage. Can also be set by software. 3GF1 General Purpose flag 1 One use is to indicate whether an interrupt occurred during normal operation or during Idle mode. 2GF0 General Purpose flag 0 One use is to indicate whether an interrupt occurred during normal operation or during Idle mode. 1PD Power-Down Mode bit Cleared by hardware when an interrupt or reset occurs. Set to activate the Power-Down mode. If IDL and PD are both set, PD takes precedence. 0IDL Idle Mode bit Cleared by hardware when an interrupt or reset occurs. Set to activate the Idle mode. If IDL and PD are both set, PD takes precedence. |
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