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ST72141K2 Datasheet(PDF) 19 Page - STMicroelectronics

No. de pieza ST72141K2
Descripción Electrónicos  8-BIT MCU WITH ELECTRIC-MOTOR CONTROL, ADC, 16-BIT TIMERS, SPI INTERFACE
PDF  132 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72141K2 Datasheet(HTML) 19 Page - STMicroelectronics

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3.2 RESET MANAGER
The RESET block includes three RESET sources
as shown in Figure 11:
s
External RESET source pulse
s
Internal LVD RESET (Low Voltage Detection)
s
Internal WATCHDOG RESET
The RESET service routine vector is fixed at ad-
dresses FFFEh-FFFFh in the ST7 memory map.
A 4096 CPU clock cycle delay allows the oscillator
to stabilise and ensures that recovery has taken
place from the Reset state.
The RESET vector fetch phase duration is 2 clock
cycles.
Figure 11. Reset Block Diagram
fCPU
RESET
RON
VDD
WATCHDOG RESET
LVD RESET
INTERNAL
RESET



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